Giám sát, kiểm tra và sửa chữa hiệu quả các thiết kế nhiều khuôn

Test and diagnose known-good stacks and know-good dies, support extensive BIST capabilities, and offer in-field interconnect monitoring for purposes such as predictive maintenance.


Despite clear advantages, there are numerous new challenges that need to be addressed for successful multi-die realization.

The multi-die test challenges include:

  • Bare chiplet level (pre-bond)
    • Probe, dedicated/functional pads for test
    • Test, diagnosis, and repair
  • Interconnects (mid/post-bond)
    • Die-to-die test access
    • Lane test, diagnosis, and repair
  • Multi-die stack/package (post-bond)
    • Die-to-die, stack/package test access
    • Calibration, diagnosis, and repair
    • Silicon debug and diagnosis

Find out more information here.


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