WebinarDecadal Plan for Semiconductors: New Compute Trajectories for Energy Efficiency – Semiconductor Industry Association
Date: April 14, 2021
Time: 11 am – 12:30 pm EDT
Computing and, more generally, Information and Communication Technologies (ICT) is the social-economic growth engine of the modern world. Rapid advances in computing have provided increased performance and enhanced features in each new generation of products in nearly every market segment, whether it be servers, PCs, communications, mobile, automotive, or entertainment, among others.
The use of information and communication technologies continues to grow without bounds dominated by the exponential creation of data that must be moved, stored, computed, communicated, secured and converted to end user information. Ever-rising energy demands for computing versus global energy production are creating new risk, therefore new computing paradigms need to be discovered that would result in dramatically improved energy efficiency of computing.
This webinar intends to identify a compelling research agenda based on the Decadal Plan for Semiconductors, led by SRC to discover new approaches to computing with a focus on changing the current mainstream compute trajectory. The underlying technical challenge is bit-utilization efficiency in computation.
Decadal Plan for Semiconductors: New Compute Trajectories for Energy Efficiency
Answers to questions submitted during webinar
Maryam Cope
Director, Government Affairs
Semiconductor Industry Association
Maryam Cope is director of government affairs at SIA. In this role, Maryam works closely with industry, Congress, and the Administration to advance key legislative and regulatory priorities related to semiconductor research and technology, high-skilled immigration, and product security. Maryam brings over a decade of technology policy and advocacy experience to SIA. Prior to SIA, she was managing partner for the technology practice at GoldsteinCope Policy Solutions. She also established the technology policy practice at the American Hotel & Lodging Association. Maryam also worked at the Information Technology Industry Council, where she led advocacy efforts in the areas of cybersecurity, encryption, and supply chain security.
Victor V. Zhirnov, Ph.D.
Chief Scientist
Semiconductor Research Corporation
Victor Zhirnov is Chief Scientist at the Semiconductor Research Corporation. He is responsible
for envisioning new long-term research directions in semiconductor information and communication technologies for industry and academia .His semiconductor experience spans over 30 years in the areas of materials, processes, devices physics and fundamental limits.
Victor received the M.S. in applied physics from the Ural Polytechnic Institute, Ekaterinburg, Russia, and the Ph.D. in solid state electronics and microelectronics from the Institute of Physics and Technology, Moscow, in 1989 and 1992, respectively. He has authored and co-authored over 150 technical papers and contributions to books.
Rob Clark
Senior Member of the Technical Staff
TEL
Robert Clark received is B.S. and M.S. in Chemistry from Virginia Tech followed by Ph.D. in Chemistry from U.C. Irvine. After completing his degrees he joined Air Products and Chemicals in 2000 at their Schumacher unit where he helped to develop the first precursors used for high k gate dielectrics in the semiconductor industry. In 2006 he joined Tokyo Electron to work on thin film process technology, and is currently a senior member of the technical staff based in Fremont, CA. His research spans thin film deposition and etch processes for use in front end and back end of line logic, memory production and integration. He holds more than 100 issued patents worldwide and has authored or co-authored hundreds of conference and journal contributions over the years including dozens of invited presentations, articles and reviews.
Carlos Diaz
Senior Director, Research and Development
TSMC
Carlos H. Diaz holds a Ph.D. in EE from University of Illinois at Urbana-Champaign. He is Senior Director in Research and Development, Taiwan Semiconductor Manufacturing Company. He has published over 100 technical papers, holds over 180 US patents, and has published one book. He is an IEEE Fellow and the recipient of the 2016 IEEE Andrew S. Grove Award. He is also recipient of the 2018 Distinguished Alumni Award in Electrical and Computer Engineering, University of Illinois at Urbana-Champaign.
Stephen Kosonocky
Senior Fellow
AMD
Stephen Kosonocky received his B.S., M.S., and Ph.D. from Rutgers University, New Brunswick, N.J., in Electrical Engineering. He is a Senior Fellow at AMD Fort Collins, Colorado since 2007, where he leads the Low Power Advanced Development team. His interests are in low power CPU, GPU and SOC design and power delivery. Prior to AMD, he was with IBM T.J. Watson Research Center in Yorktown Heights, Samsung Princeton Design and Siemens Corporate Research in Princeton. He is the AMD representative on the SRC Executive Technical Advisory Board and has been a past General Chair of Symposium on VLSI Circuits and held multiple sub-committee Chair positions at ISSCC. He has authored or co-authored over 71 publications and workshops and is an inventor on over 78 Issued and Pending U.S and International Patents.
Heike Riel
IBM Fellow, Head Science & Technology
IBM Research
Heike Riel is IBM Fellow, Head of Science & Technology and Lead of IBM Research Quantum Europe & Africa. She leads the research and operation of the Science & Technology department aiming to create scientific and technological breakthroughs in Quantum Computing and Technologies, Physics of Artificial Intelligence, Nanoscience and Nanotechnology and to explore new directions to computing. She is a distinguished expert in nanotechnology and nanosciences and focuses her research on advancing the frontiers of information technology through the physical sciences. She received the PhD in physics from University of Bayreuth and an MBA from Henley Business College (UK). She has authored more than 150 peer-reviewed publications and filed more than 50 patents and has received several honors, e.g., the APS David Adler Lectureship Award in the Field of Materials Physics, APS Fellow, elected member of the Leopoldina – German National Academy of Sciences and the Swiss Academy of Engineering Sciences; an honorary doctorate by Lund University.
Gilroy Vandentop
Director of Corporate University Research
Intel
Gilroy Vandentop is the Director of Corporate University Research, within Intel Labs. His team manages Intel’s university research investments for key internal technology and business customers. Gilroy is also on the board of the Semiconductor Research Corporation, an industry wide consortium. He managed the SRC STARnet program and is currently chair for the Governing Council of the JUMP/nCORE program.
Gilroy moved to Intel Labs from TMG’s Components Research group in 2015. While in Components Research, he formed the Novel Materials group and managed Intel’s EUV program through transfer into technology development. From 2000 to 2006, he was responsible for the Packaging Research group in Chandler, AZ. During his first 10 years at Intel, Gilroy worked in Logic Tech
Jim Ang
Chief Scientist for Computing in the Physical and Computational Sciences Directorate
PNNL
James (Jim) Ang serves as the Pacific Northwest National Laboratory (PNNL) sector lead for the U.S. DOE Office of Science, Advanced Scientific Computing Research (ASCR) Program. Dr. Ang established and leads PNNL’s Data-Model Convergence (DMC) Initiative which directly supports lab objectives in accelerating scientific discovery and real time control of the power grid. The DMC Initiative is pursuing a hardware-software co-design approach to support converged workloads that arise from the integration of physical science, e.g., high performance computing simulations and experimental measurements, and data science, e.g., AI/ML and data/graph analytics.
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