Mở rộng lộ trình DDR5 với MRDIMM

Given the voracious memory bandwidth and capacity demands of Gen AI and other advanced workloads, we’ve seen a rapid progression through the generations of DDR5 memory. Multiplexed Registered DIMMs (MRDIMMs) offer a new memory module architecture capable of extending the DDR5 roadmap and expanding the capabilities of server main memory. MRDIMM reuses the lion’s share of existing DDR5 infrastructure but introduces new concepts that provide huge memory bandwidth and capacity benefits.

On the bandwidth front, an MRDIMM utilizes standard DDR5 DRAM devices in a configuration very similar to an RDIMM, but in MRDIMM multiple ranks of DRAM are simultaneously activated and accessed, and data streams from these ranks are then multiplexed together onto the memory controller or host side data bus running twice the native DRAM speed. So, the number of signals between the memory module and the CPU stay the same (i.e. no change in the standard DIMM connector), but the signal data rate and the bandwidth available to the CPU per DIMM slot is effectively doubled.

The parallel access of DRAMs and the mux’ing/demux’ing of these parallel accesses leads to the effective bandwidth increase, which can now scale beyond the native DRAM speed. So as an example, an MRDIMM utilizing standard DDR5-6400 MT/s devices would have an equivalent bandwidth to an RDIMM utilizing DDR5-12800 devices. The industry-standard MRDIMM 12800 will operate in exactly this fashion.

On the capacity front, the change in the protocol to address ranks in parallel, combined with some physical changes on the module, now allow for more than two ranks of DRAMs to be addressed. Today as RDIMM is defined, there is not a cost-effective way to go beyond two ranks of DRAMs. With the MRDIMM changes, a taller DIMM with 4-8 ranks using single die package DRAM could be implemented, or a standard sized DIMM could use 4-8 ranks of dual die packages. This is a very cost-efficient way of increasing the memory capacity per DIMM slot in a DDR5 system. One would have to be cognizant of the thermal challenges when laying out these devices.

In order to reap the benefits outlined above, a CPU must explicitly support MRDIMM to take advantage of these features. In addition, there are some new and upgraded components needed on the MRDIMM module. The SPD Hub and temperature sensor ICs are the same ones used on RDIMMs, so that technology is directly leveraged. Two key new components are the multiplexing registered clock driver (MRCD) and the multiplexing data buffer (MDB).

The MDB interfaces to the DRAM devices and does the multiplexing and demultiplexing necessary to convert a 16-bit DRAM interface running at native DRAM speed to an 8-bit host interface running at twice that speed. Furthermore, it provides load isolation to the host or CPU, which is a key enabler for MRDIMM to increase the number of ranks and overall capacity of the module. These MDBs are located very close to the gold fingers of the DIMM for superior signal integrity and there are 10 such devices per MRDIMM to provide the full 80-bit host DDR5 interface.

To get full utilization of the module, the command bandwidth to these parallel ranks must be maintained. The MRCD extends the typical registering clock driver function to receive an interleaved stream of DRAM commands at twice the typical RDIMM rate. It deinterleaves the command data stream and then steers it correctly to its rank specific outputs. Furthermore, it now communicates with the MDBs via a dedicated interface to configure them properly for read and write operations.

Finally, given the parallel activations of DRAM ranks and the additional chips added to the chipset, the absolute power envelope of the module is higher than a typical RDIMM. Therefore, a new PMIC – the PMIC5030 – has been defined to comfortably handle the amount of power required of such a high-bandwidth/high-capacity DIMM. In addition to MRDIMM 12800 and beyond, the PMIC5030 will enable all DDR5 RDIMMs at 8000 MT/s and above.

Rambus has been a trusted, US-based partner and innovator in the memory and signal integrity space for over 30 years. In the last ten years, we have established ourselves as a robust supplier of high-quality semiconductor products that meet the market windows for our customers with performance and margin that exceed the specifications. Rambus is a complete supplier of components for memory modules today and has announced full memory interface chipsets for DDR5 MRDIMM 12800 and all DDR5 RDIMM speed grades up to 8000 MT/s. We have the necessary memory subsystem experience to develop fully interoperable products, and we have the tools and core competency to quickly help bring-up, enable, and qualify our customer’s products in their use case environments.

See more: DDR5 Server Memory Interface Chipset.