Cho phép thiết kế dựa trên Chiplet đa nhà cung cấp sáng tạo

Chiplets have emerged as a critical implementation paradigm for semiconductor products, primarily because they can deliver cost benefits relative to a non-chiplet-based approach.

The first, most well-proven, and obvious benefit of a chiplet-based approach is manufacturing cost. Manufacturing cost benefits are accrued either from the appropriate selection of chiplet die size, or by optimizing the technology node of the individual chiplets to best line up with the specific functionality/features they realize.

Note that die size selection doesn’t necessarily mean each chiplet is “small.” In some cases the chiplets are full reticles, but they are being stitched together on package and resulting in a more cost-effective solution than alternative approaches with the same net silicon area. In the case of node optimization, more peripheral or I/O functionality (e.g.) may be best implemented in more mature nodes where the performance is more than sufficient, but the cost is substantially lower than the latest cutting-edge node.

Even though manufacturing cost optimization is the most well-proven and clear benefit, much of the discussion around chiplets and chiplet markets is motivated by the desire to save design costs. It is important to remember that for most of the market (from a monetary perspective), the manufacturing cost cannot be sacrificed for design cost savings. In other words, manufacturing cost savings are effectively a requirement to enter the chiplet design space.

With that consideration in mind, let’s discuss the three dominant chiplet product use cases we see emerging today. The first is what we refer to as a single-vendor scenario where, at least conceptually speaking, a single vendor owns all the chiplets in the end product’s package. Each chiplet is defined in a way that this vendor has determined to provide them with maximum benefit and performance for a given product or product family they are developing.

Let’s next consider what the priorities of that vendor would be when designing a chiplet for this single-vendor use case. Because an individual organization owns all of the chiplets, one is highly motivated to optimize as much as practically possible for power, performance, area, and cost, while also meeting the particular feature needed for a particular market or product family.

Swinging all the way to the other extreme from a use-case perspective, consider a plug-and-play type of market, where there is a strong vision and desire to take off-the-shelf chiplets from a catalog (a la DigiKey) and put them together in new and previously unforeseen or unexpected ways. In putting the chiplets together, one can realize a system-in-package that represents a new and innovative product.

Even in this plug-and-play scenario, the hardware designers and end product owners still care a lot about power, performance, area, and cost. After all, this product still needs to compete in the market for that functionality. However, interoperability and configurability now must also be strongly considered, because plug-and-play implies that you can take a chiplet from anywhere and put it together with other chiplets from anywhere and make the whole SiP work. This is a great idea and a great vision, but for technical (as well as business) reasons that I will delve into further later in this post, it’s not quite there in practice.

While a truly plug-and-play chiplet market is still somewhat of a distant future, what is very much already emerging is what we at Blue Cheetah refer to as a multi-vendor ecosystem. These ecosystems are able to reap most of the benefits that the industry is looking for in the plug-and-play market, but do so in a much more practical and immediately realizable way.

In a multi-vendor ecosystem chiplet use case, you get groups of companies together that have aligned interests and sets of expertise that each organization can apply to each of their individual chiplets, with the companies jointly defining the product or product family that they are developing. With these product targets in mind, the companies then can define very concretely what each of the individual chiplets is supposed to do, what their thermal characteristics need to be, what their mechanical footprints will be, what their electrical properties need to be, etc. With these definitions in hand, we are now in a similar situation to the single vendor case, where there are very concrete and specific goals/specifications one is trying to achieve. In essence, the companies will have defined a set of chiplet “sockets” – those sockets are appropriate for a specific product/package family, as opposed to attempting to serve any broad unforeseen future usage.

From a design priority, in multi-vendor ecosystem use cases, power, performance, and cost are the critical considerations. Being standards-based is also typically desirable — not necessarily so that each of these chiplets themselves will be a standardized product, but simply so that there’s a common baseline approach or architecture for everything to be built on. An individual chiplet design might adopt the aspects of the standards that are good enough, or which have no penalty for use in the context of the specific socket, but might also innovate/customize (to that specific socket) in aspects that are critical to the end product.

As discussed, the plug-and-play use case presents a very alluring vision, but it is primarily driven by the desire to reap design cost benefits from chiplets, and not from the manufacturing cost. Stated differently, the attractiveness stems from the idea that one can incur NRE costs once to develop a chiplet, and then, at least according to the vision, you get to address any possible market with that one chiplet.

While true plug-and-play and general-purpose chiplets have not yet become a practical reality, there is one (perhaps the only) shining example of a product sold successfully as a standalone chiplet to a number of markets, and that is HBM. In the context of this discussion, it is important to consider a couple of key factors that enabled HBM’s success. First, HBM chiplets are very tightly functionally, mechanically, and electrically specified – in this case by a standards body (JEDEC). Second, and closely related to that first consideration, HBM is supplied by vendors that have succeeded while competing in a commodity market.

If we want to build on the success of HBM to enable a broader (logic) chiplet market, we will need to adopt a similar approach in terms of the detailed level of specification each chiplet needs to be designed into – hence, the earlier discussion about “chiplet sockets.” One of the challenges here, however, is that compared to HBM (i.e., DRAM), logic chiplets tend to have significantly higher diversity in terms of functionality, and hence their electrical, mechanical and other specifications also tend to vary much more widely than a DRAM. (This isn’t to say that DRAM products are not amazing pieces of technology, because they absolutely are. But DRAMs are intentionally built to be logically much simpler than something like a processor or I/O subsystem, etc.)

At this point it might be useful to consider what typically happens when one tries to build truly general plug and play chiplets beyond the context of a particular end product or product family. In particular, what typically ends up happening is that product owner/architect is told they need to enable that chiplet to be competitive or even leading across a diffuse and often contradictory set of end goals. As you can imagine, this is very likely going to lead to schedule, cost, power, performance, or other overruns, primarily because the product owner/architect can very easily get into a loop where they are not unsure what the right thing to build is. To make matters worse, integrating chiplets onto a shared package is a very different exercise (in terms of technical complexity, know how, and flexibility) than integration onto a PCB, and so the poor product architect / owner has to figure out how to balance out yet another set of potential competing considerations. This means that the chiplet product might be indefinitely/continuously delayed, or that when it does come out, it incorporates so many overheads that it is simply not very attractive as compared to a more custom-fit and streamlined solution tailored for a given application.

At the risk of stating what is hopefully by now obvious, based on all these considerations, the path forward for a chiplet market lies in the multi-vendor ecosystems approach. The partners in these ecosystems will define the individual chiplet sockets that meet the sweet spots for their target product, product family or overall product roadmap. We can easily imagine 5-10 such ecosystems emerging, each of which has defined chiplet sockets for its specific products/applications. Once the chiplet sockets are defined for individual ecosystems, the successful ones will end up serving markets that have large enough monetary volume to make it attractive for other players to come in and design chiplets into their corresponding sockets. Hence, instead of focusing on a plug-and-play type of world, we as an industry/community should be thinking about defining all the key aspects of the chiplet sockets that will each be large enough to justify the cost of development for the players in those markets.

With this focus toward multi-vendor ecosystems in mind, in the context of individual chiplet sockets, it soon becomes clear that the die-to-die interfaces need to be customized to the end product use cases. At Blue Cheetah, we’ve developed technology that allows us to rapidly and efficiently configure and deliver highly optimized UCIe, Bunch of Wires (BoW), or even custom die-to-die interfaces that are tailored to meet the specific end goals of our customers’ products. Our solutions are very broadly deployed — we have more than 15 customers — and available in 3 foundries across more than 6 different process nodes.

To sum up, chiplets have emerged as a key implementation strategy for the full spectrum of semiconductor products. This is driven by the fact that chiplets enable us to realize manufacturing cost optimization. Although there are no one-size-fits-all solutions for chiplets, once the appropriate chiplet sockets are defined, chiplets can and will deliver on the promise of improved design cost optimization for large end-product markets, as well.