Applied Materials Advances Heterogeneous Chip Integration with New Technologies for Hybrid Bonding and Through … – GlobeNewswire

| Source: Applied Materials, Inc. Applied Materials, Inc.
SANTA CLARA, Calif., July 10, 2023 (GLOBE NEWSWIRE) — Applied Materials, Inc. today introduced materials, technologies and systems that help chipmakers integrate chiplets into advanced 2.5D and 3D packages using hybrid bonding and through-silicon vias (TSVs). The new solutions extend Applied’s industry-leading breadth of technologies for heterogeneous integration (HI).
HI helps semiconductor companies combine chiplets based on a variety of functions, technology nodes and sizes in advanced packages, enabling the combination to perform as a single product. HI helps solve industry challenges created in part because the need for transistors in applications like high-performance computing and artificial intelligence continues to increase at an exponential rate, while the ability to shrink transistors with classic 2D scaling is slowing and becoming more expensive. HI is a core component of a new playbook that enables chipmakers to improve chip performance, power, area-cost and time to market (PPACt) in new ways.
Applied is the largest supplier of technologies for HI with optimized chipmaking systems spanning etch, physical vapor deposition (PVD), chemical vapor deposition (CVD), electroplating, chemical mechanical polishing (CMP), annealing and surface treatments.
“Heterogeneous integration is growing rapidly because it helps chip and systems companies overcome the limits of classic 2D scaling, which no longer delivers simultaneous improvements in performance, power and cost,” said Dr. Sundar Ramamurthy, Group Vice President and General Manager of HI, ICAPS and Epitaxy, Semiconductor Products Group at Applied Materials. “Our latest HI solutions advance the industry’s newest ways to pack more transistors and wiring in 2.5D and 3D configurations to increase system performance, reduce power consumption, minimize size and speed time to market.”
Making Hybrid Bonds Stronger and Better
Chip-to-wafer and wafer-to-wafer hybrid bonding can be used to connect chips using direct, copper-to-copper bonds that enable the combined elements to perform as one. Hybrid bonding is the industry’s most advanced HI technology in production today, improving throughput and power by packing more wiring into smaller spaces and reducing the distances signals need to travel.
Introduced today:
Bringing Through-Silicon Vias to New Heights
Used in high-volume manufacturing for more than a decade, TSVs are vertical wires used to precisely connect stacked chips. They are formed by etching trenches into silicon and then filling them with insulating liners and metal wires. As designers continue to integrate more logic, memory and specialty chips into advanced 2.5D and 3D packages, the number of TSV interconnects has expanded from a few hundred per package to thousands. To integrate more interconnects and accommodate taller stacks of chips, designers need the vias to become increasingly narrow and tall, which results in deposition uniformity variations that degrade performance and increase resistance and power consumption.
Applied today introduced new technologies for both dielectric and metal deposition that enable higher-aspect-ratio TSVs and help chipmakers achieve their integration, performance and power goals:
Forward-Looking Statements
This press release contains forward-looking statements, including those regarding anticipated benefits of our new products and technologies; expected growth and trends in our businesses and markets, industry outlooks and demand drivers, technology transitions, and other statements that are not historical facts. These statements and their underlying assumptions are subject to risks and uncertainties and are not guarantees of future performance. Factors that could cause actual results to differ materially from those expressed or implied by such statements include, without limitation: failure to realize anticipated benefits of our new products and technologies; the demand for semiconductors; customers’ technology and capacity requirements; the introduction of new and innovative technologies, and the timing of technology transitions; market acceptance of existing and newly developed products; the ability to obtain and protect intellectual property rights in technologies; our ability to ensure compliance with applicable environmental and other law, rules and regulations; and other risks and uncertainties described in our SEC filings, including our recent Forms 10-Q and 8-K. All forward-looking statements are based on management’s current estimates, projections and assumptions, and we assume no obligation to update them.
About Applied Materials
Applied Materials, Inc. (Nasdaq: AMAT) is the leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. Our expertise in modifying materials at atomic levels and on an industrial scale enables customers to transform possibilities into reality. At Applied Materials, our innovations make possible a better future. Learn more at www.appliedmaterials.com.
Contact:
Ricky Gradwohl (editorial/media) 408.235.4676
Michael Sullivan (financial community) 408.986.7977
A photo accompanying this announcement is available at https://www.globenewswire.com/NewsRoom/AttachmentNg/a91d43a4-4b51-46b7-8984-6ff91ad788e7
These photos are also available at Newscom, www.newscom.com, and via AP PhotoExpress.

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