AMD, Samsung Set To Team Up For Advanced 3-nanometer Chips – Report – Wccftech
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Amidst a rumor filled month for the semiconductor industry, fresh reports from Korea indicate that AMD might team up with Samsung for the latter’s 3-nanometer semiconductor manufacturing process technology. Samsung and TSMC are the only firms in the world that have shelf ready chip production lines available to firms such as AMD and NVIDIA. Their latest processes are the 3-nanometer nodes, and while they are similar in name, their transistors are designed differently. TSMC, which plans to use nanosheet transistors in its future processes, relies on the reliable FinFET setup for its products.
In contrast, Samsung offers customers the ability to use newer gate all around (GAAFET) transistors that allow chip designers to improve the flow of electricity inside their products but have some drawbacks.
According to a report from the Korea Economic Daily, Samsung and AMD are expected to deepen their partnership to manufacture next-generation chips with the 3-nanometer process technology. Right now, chips manufactured with this technology are not available for most personal computers since only Apple’s Mac lineup uses those manufactured by Taiwan’s TSMC.
Samsung’s 3-nanometer stands apart from TSMC’s because it uses gate all around (GAAFET) transistors.GAAFET is an upgraded transistor design over FinFET, and it allows designers to improve electrical flow due to improvements that allow the channel of a transistor to be completely surrounded by the gate.
GAAFET transistors use either nanowires or nanosheets to conduct electricity. These come with trade offs associated with the the wires or the sheets. While the wires improve efficiency, their small area limits them to certain products, such as application processors. On the other hand, the nanosheets allow for more current to flow through at the expense of a loss in conduction efficiency.
The report quotes AMD CEO Lisa Su sharing the benefits of GAAFET transistors over FinFET during a recent conference held in Belgium as evidence of the firms’ interest in deepening their partnership. According to the Korean Economic Daily, Su shared her firm’s plans to mass produce AMD’s next generation products with gate all around technology.
Since Samsung is the only firm in the world that makes 3-nanometer GAAFET products, analysts are taking Su’s comments as the cue for the Korean firm to make AMD’s new chips. Su also believes that 3-nanometer GAAFET offers performance and efficiency benefits over previous technologies, reports the Daily.
The current dynamics of the contract semiconductor fabrication industry have pitted Samsung and Intel against TSMC. TSMC holds the dominant position in the market, and its two sizable rivals are busy employing new technologies to secure an advantage over their well heeled competitor.
Intel is studying advanced chip manufacturing equipment called High NA EUV to see if it can reduce manufacturing costs and complexity. Samsung, on the other hand, not only started its 3-nanometer production earlier than TSMC but also sought to wrest 3-nanometer product market share away from the Taiwanese firm by introducing the advanced GAAFET transistor earlier in its product roadmap.
On the flip side, TSMC has stressed that it can use conventional EUV machines to make chips for quite some years and announced that it will make the switch to nanosheet transistors with its 2-nanometer process. Gate all around transistors are also the consequence of smaller feature sizes as manufactures often struggle with manufacturing FinFETs the smaller that these transistors get.
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