Advanced Packaging Technologies for Semiconductor Devices – uat vcastapi
« All Events
Join us at 10:30 AM in MEC 114 for a presentation from Kunal Parekh and Derek Nesbitt, engineers on the Advanced Packaging Technology Development team at Micron.
Derek Nesbitt will share his perspective on the science and technology he works on and how students can benefit from studying science topics that will prepare them for careers in Semiconductors and their packaging.
Kunal Parekh plans on introducing Advanced Packaging as an interdisciplinary field that requires expertise in a wide range of sciences and engineering. For example a typical semiconductor must go through processing to thin the silicon, this requires both mechanical processes, and in some instances chemical processing. To protect the devices, we may use polymers which can be organic or inorganic materials that have the appropriate thermal, mechanical and insulative properties, and so chemists, polymer scientists, also engage in enabling development of materials and processing of them. Metals are used in wiring and interconnecting chips to each other or to substrates and this requires material science and engineering as well as electrical engineering to insure proper signaling through these metals in support of the circuits they are interconnecting.
A packaged semiconductor must both environmentally protect the devices within them while also interacting with other packaged or components connected to it, and live in an environment with different ambient and temperature exposures, vibration and other factors. This requires design and engineering to ensure that heat can be removed from the devices operating through the package and devices can be reliable in the products operating environment and lifetime. This talk will discuss some of these topics, to show the diversity of opportunity for academics to participate in this field which is a priority for the US government to support and re-shore both development and manufacturing.
Speaker Bio
Kunal Parekh is a Sr. Director in Advanced Packaging Technology Development at Micron. His 30+ year career in the Semiconductor industry has provided him the opportunity to lead front end silicon wafer Integration, development and manufacturing of semiconductor memory products like DRAM, NAND, Phase Change Memory, and Through Silicon Via technology (TSV) for High Density Stacked Interconnects and High Bandwidth Memory which enables advances in High Performance Computing and Artificial Intelligence applications. He cofounded the IEEE EDS Chapter in Boise, the IEEE Workshop on Microelectronics and Electron Devices, and has served on the Symposium for VLSI Technology Committee. His contributions to innovation have resulted in over 250 US and foreign patents.
Derek Nesbitt is an engineer in the Advanced Packaging Technology Development team and a recent graduate from BSU with PhD in Biomedical Engineering.
© 2024 All Rights Reserved Boise State University.
